[TRNSPRTPCE-598] Incorrect portmapping for SRGs with multiple circuit packs Created: 03/Feb/22 Updated: 20/Sep/23 Resolved: 07/Feb/22 |
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| Status: | Verified |
| Project: | transportpce |
| Component/s: | None |
| Affects Version/s: | None |
| Fix Version/s: | Phosphorus, Sulfur |
| Type: | Bug | Priority: | Medium |
| Reporter: | Jonas Mårtensson | Assignee: | Jonas Mårtensson |
| Resolution: | Done | Votes: | 0 |
| Labels: | None | ||
| Remaining Estimate: | Not Specified | ||
| Time Spent: | Not Specified | ||
| Original Estimate: | Not Specified | ||
| Description |
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The createPpPortMapping function resets the logical connection port index to 1 for every processed circuit pack in an SRG so that multiple physical ports (cp-name/port-name) are mapped to the same logical PP port. As a result, only the ports on the circuit pack processed last are available. |