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        <build-date>22-06-2022</build-date>
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<item>
            <title>[CONTROLLER-390] Adaptors need to correctly map reserve ports</title>
                <link>https://jira.opendaylight.org/browse/CONTROLLER-390</link>
                <project id="10113" key="CONTROLLER">controller</project>
                    <description>&lt;p&gt;The adaptors need to correctly translate the reserve ports requested by:&lt;/p&gt;

&lt;p&gt;&lt;a href=&quot;https://bugs.opendaylight.org/show_bug.cgi?id=835&quot; class=&quot;external-link&quot; target=&quot;_blank&quot; rel=&quot;nofollow noopener&quot;&gt;https://bugs.opendaylight.org/show_bug.cgi?id=835&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;to logical ports, not numerical ones.&lt;/p&gt;</description>
                <environment>&lt;p&gt;Operating System: Mac OS&lt;br/&gt;
Platform: PC&lt;/p&gt;</environment>
        <key id="24944">CONTROLLER-390</key>
            <summary>Adaptors need to correctly map reserve ports</summary>
                <type id="10104" iconUrl="https://jira.opendaylight.org/secure/viewavatar?size=xsmall&amp;avatarId=10303&amp;avatarType=issuetype">Bug</type>
                                                <status id="5" iconUrl="https://jira.opendaylight.org/images/icons/statuses/resolved.png" description="A resolution has been taken, and it is awaiting verification by reporter. From here issues are either reopened, or are closed.">Resolved</status>
                    <statusCategory id="3" key="done" colorName="green"/>
                                    <resolution id="10000">Done</resolution>
                                        <assignee username="kramesha@cisco.com">Kamal Rameshan</assignee>
                                    <reporter username="hagbard">Ed Warnicke</reporter>
                        <labels>
                    </labels>
                <created>Wed, 23 Apr 2014 15:12:14 +0000</created>
                <updated>Tue, 25 Jul 2023 08:23:37 +0000</updated>
                            <resolved>Tue, 5 May 2015 15:17:28 +0000</resolved>
                                                                    <component>adsal</component>
                        <due></due>
                            <votes>0</votes>
                                    <watches>3</watches>
                                                                                                                <comments>
                            <comment id="48137" author="kramesha@cisco.com" created="Tue, 3 Jun 2014 06:24:56 +0000"  >&lt;p&gt;&lt;a href=&quot;https://git.opendaylight.org/gerrit/#/c/7618/&quot; class=&quot;external-link&quot; target=&quot;_blank&quot; rel=&quot;nofollow noopener&quot;&gt;https://git.opendaylight.org/gerrit/#/c/7618/&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;&lt;a href=&quot;https://git.opendaylight.org/gerrit/#/c/7619/&quot; class=&quot;external-link&quot; target=&quot;_blank&quot; rel=&quot;nofollow noopener&quot;&gt;https://git.opendaylight.org/gerrit/#/c/7619/&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;Gerrits are submitted. &lt;/p&gt;

&lt;p&gt;Following testing are done to validate these changes:&lt;br/&gt;
1. Ping and ping-all works. Ping-all should use SimpleForwardingManager in ADSAL and hence should go via adapters&lt;br/&gt;
2. Topology, statistics and controller nb urls show the correct logical names&lt;br/&gt;
3. Add flow, update flow and remove flow works&lt;br/&gt;
4. Flow with action on reserve port also works&lt;/p&gt;</comment>
                            <comment id="48138" author="carolsand@gmail.com" created="Tue, 5 May 2015 15:17:28 +0000"  >&lt;p&gt;This bug is part of the project to Move all ADSAL associated component bugs to ADSAL.&lt;/p&gt;</comment>
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                                        <issuelink>
            <issuekey id="27378">OPNFLWPLUG-110</issuekey>
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            <issuelink>
            <issuekey id="27389">OPNFLWPLUG-121</issuekey>
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